The present invention relates to a memory device, and more particularly to a memory circuit formed in a semiconductor memory device and having a redundant memory cell array for replacing a faulty cell or cells in a regular memory cell array.
In order to increase the fabrication yield of memory devices, there has been proposed a technique to relieve a memory chip whose regular memory cell array involves a faulty cell or cells by providing a redundant memory cell array in addition to the regular one and functionally replacing a faulty cell or cells with a good memory cell in the redundant array. Although there is a high demand for the use of memory devices, such as, those formed over gallium arsenide substrates for performing a required operating speed in large scale computers and measuring equipments, their fabrication yield is not high enough because of the ununiformity of the substrate crystals, peculiar to chemical compound semiconductors, and the unstable control of the fabricating process.
There is under study a method to relieve memory devices having defects in memory cells and to improve the currently low fabrication yield of such memory devices by keeping always unselectable the faulty memory cell-containing column or row in a regular memory cell array in such devices, and replacing the faulty cells with good memory cells in the redundant column or row, as the case may be.
In such a memory circuit, a regular decoder is provided for the regular memory cell array, and a redundant decoder is provided for the redundant memory cell array. The regular decoder has a regular decoder unit for each column or row of the regular memory cell array, and the redundant decoder has a redundant decoder unit for each column or row of the redundant memory cell array. The regular decoder unit is made operative before programing the redundant decoder by using a fuse or some other program element continued therein, such as blowing the fuse. The regular decoder selecting the faulty cell in a regular memory cell array is made inoperative after the programming is finished. The redundant decoder is made inoperative before the programming is performed thereto, and operative after they are programmed. A memory chip, after being fabricated, is tested for detecting faults in memory cells in the regular array by using the regular decoder. If testing reveals the presence of any faulty memory cells in the regular array, the program element in the regular decoder unit for selecting this faulty cell is programmed to make this decoder unit inoperative, while the program elements in the redundant decoder unit are programmed to make it operative. Thus a memory cell in the redundant array is selected to replace the faulty memory cell in the regular array.
At this time, however, the redundant decoder is in an inoperative state, so that the memory cells in the redundant array are not tested. This is because that it is assumed all the memory cells in the redundant array are satisfactory. Furthermore, fuses are generally used as the program elements, and the programmed action on a fuse, i.e. blowing, is not reversible. Therefore, once a program element, i.e. a fuse, in the redundant decoder unit is blown to make this redundant unit operative, the memory chip can no longer be relieved even if the memory cell in the redundant array is faulty. Therefore, the redundant structure in the prior art is limited in its contribution to increasing the fabrication yield.